1. Field of the Invention
The present invention relates to a method for forming a semiconductor structure, and more particularly, to a method for forming a semiconductor structure having a MOS with a TiN layer as the barrier layer.
2. Description of the Prior Art
In modern society, the micro-processor systems comprising integrated circuits (IC) are ubiquitous devices, which are utilized in diverse fields such as automatic control electronics, mobile communication devices and personal computers. With the development of technologies and the increasingly imaginative applications of the electrical products, the IC devices become smaller, more delicate and more diversified.
Metal-oxide-semiconductors (MOS) transistors are usually used in the integrated circuits. Conventionally, a poly-silicon layer is used as the gate material of the MOS. However, with a trend toward scaling down the size of semiconductor devices, conventional poly-silicon gates face problems such as inferior performances due to boron penetration and unavoidable depletion effect, which increases the equivalent thickness of the gate dielectric layer, reduces the gate capacitance, and worsens a driving force of the devices. Therefore, metals with a work function that are suitable for use as the high-k gate dielectric layer, are used to replace the conventional poly-silicon gates to serve as the control electrode.
However, some issues still need to be overcome in the current metal gate MOS fabrication method.